28, May 2025

Scalable Image Processing Framework Using Zynq ZedBoard: A VLSI Perspective

VOLUME-11; ISSUE-5; MAY-2025

Author(s): 1 Anushka, 2 Kanika Jindal, 3 Ashutosh Kumar Singh,

Authors Affiliations:

1M.Tech Scholar, Department of Electronics and Communication, NIET,  Greater Noida, India

2Assistant Professor, Department of Electronics and Communication, NIET,  Greater Noida, India

3Assistant Professor, Department of Electronics and Communication, NIET,  Greater Noida, India

DOIs:10.2015/IJIRMF/202505028     |     Paper ID: IJIRMF202505028


Abstract
Keywords
Cite this Article/Paper as
References

This research aims to develop a high-performance, energy-efficient image processing system using VLSI design methodologies on the Xilinx Zynq ZedBoard FPGA. By leveraging the ARM-FPGA architecture of the Zynq-7000 SoC, the project will implement real-time processing algorithms, such as edge detection and filtering, through hardware-software co-design. The ARM processor will manage control logic, while the programmable logic will execute time-critical tasks. The study focuses on optimizing resource utilization, processing speed, and power efficiency. The proposed system is intended for embedded vision applications, contributing to advancements in real-time image analysis through efficient and scalable hardware implementations. The research also focuses on optimizing resource utilization, scalability, and real-time responsiveness. Targeted applications include embedded vision systems, surveillance, and portable medical imaging. The expected outcome is a robust and efficient image processing platform that demonstrates the advantages of VLSI implementation in modern FPGA-based embedded systems.

VLSI Design, Image Processing, FPGA, Zynq ZedBoard

Kanika Jindal, Ashutosh Kumar Singh(2025); Scalable Image Processing Framework Using Zynq ZedBoard: A VLSI Perspective, International Journal for Innovative Research in Multidisciplinary Field, ISSN(O): 2455-0620, Vol-11, Issue-5, Pp.182-185.           Available on –   https://www.ijirmf.com/

  • Owens, R. M., Hammond, L., & Owens, J. D. (2004). A survey of FPGA-based image processing systems. IEEE Transactions on Circuits and Systems for Video Technology, 14(8), 1201–1216. https://doi.org/10.1109/TCSVT.2004.834494
  • Goh, S. S. L., Chuang, C. M., & Leong, M. Y. (2013). High-performance FPGA implementation of real-time image processing algorithms. Journal of Real-Time Image Processing, 8(3), 333–344. https://doi.org/10.1007/s11554-013-0323-0
  • Hsieh, S. S. D. P., & Lu, W. D. (2011). FPGA-based acceleration for real-time image processing applications. IEEE Journal of Solid-State Circuits, 46(7), 1565–1575. https://doi.org/10.1109/JSSC.2011.2149315
  • Wang, X., & Li, Y. (2015). FPGA-based real-time image processing system for object detection. In Proceedings of the IEEE International Conference on Image Processing (ICIP 2015) (pp. 123-126). IEEE. https://doi.org/10.1109/ICIP.2015.7350861
  • 5. Zhang, L., & Liu, J. (2017). High-speed FPGA implementation of edge detection algorithms. In Proceedings of the 2017 International Conference on Field-Programmable Technology (FPT 2017) (pp. 240-243). IEEE. https://doi.org/10.1109/FPT.2017.83
  • 6. Singh, R., & Gupta, S. (2016). Hardware acceleration of image filtering using FPGA for real-time applications. In Proceedings of the International Conference on VLSI and Embedded Systems (VLSIES 2016) (pp. 78-82). IEEE. https://doi.org/10.1109/VLSIES.2016.7914190
Post Views: 70

Download Full Paper

Download PDF No. of Downloads:9 | No. of Views: 70